Bi Stable Multi Vibrator or Set Reset Flip Flop

Bi Stable Multi Vibrator or Set Reset Flip Flop

Introduction:- Bi stable multi vibrator has two stable states that is its output can be set to 1 with set pulse or can be set to 0 with reset pulse. It is also known as set reset flip flop or SR flip flop. It is the basic unit of electronic solid state memory. It stores one bit of data that is 0 or 1.To store 8 bits data set of 8 flip flop are used. Register also uses the flip flops for storing data. Additional logic circuitry is also used to write read data.

Basically in all digital circuit supply voltage used is 5 volt dc. So in this set reset flip flop working voltage 5 volt is given to Vcc and - ve to ground. There are two input points set and reset. When a positive pulse is given to set input the output of flip flop changes to state 1. This state remains constant until a reset pulse is given to reset input. Again when we want to reset a reset pulse is given to reset input, the output reset to 0 state and remain in 0 state until set pulse is given to set input.
this property of SR flip flop make it suitable for digital bit storage. According to data bits all flip flop of eight bit storage locations are set to their corresponding bit. In simple electronics this flip flop can be used to make latching relay circuit.

Circuit Working:- When set switch is pressed positive voltage goes to the base of transistor T1 make it conducting. So the collector voltage of transistor T1 becomes 0 so biasing of transistor T2 base through R3 resistance reduce to 0 volt and T2 gets cutoff. Due to cutoff of  transistor T2 collector voltage of transistor T2 becomes 5 volt which start providing biasing to base of  transistor T1  through resistance R4 this makes T1 to remain in saturation level even after set button is depressed.
Same process is repeated when reset button is pressed. Transistor T2 start conducting so the collector voltage of T2 becomes 0 volt so biasing of T1 base trough resistance R4 reduced to 0 volt and T1 gets cutoff. Due to cutoff of transistor T1 the collector voltage of T1 becomes 5 volt which start providing biasing to base of transistor T2 trough resistance R3 this makes transistor T2 to remain in saturation level even after reset button is depressed.


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